SatCat5: UART, SPI and I2C via Ethernet With FPGA-Based Design

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Arty A7-based prototype of SatCat5 with custom switch I/O board. (Credit: The Aerospace Corporation)

” data-medium-file=”https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?w=400″ data-large-file=”https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?w=800″ class=”size-medium wp-image-672387″ src=”https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?w=400″ alt=”Arty A7-based prototype of SatCat5 with custom switch I/O board. (Credit: The Aerospace Corporation)” width=”400″ height=”293″ srcset=”https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg 1502w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?resize=250,183 250w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?resize=400,293 400w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?resize=800,585 800w” sizes=”(max-width: 400px) 100vw, 400px”>

Arty A7-based prototype of SatCat5 with customized change I/O board. (Credit score: The Aerospace Company)

To the typical microcontroller, Ethernet networks are fairly a step up from the essential I2C, SPI and UART interfaces, requiring both a built-in Ethernet MAC or SPI-based MAC, with tedious translation between Ethernet and people different interfaces. But what if this translation may very well be executed mechanically and transparently?  That is what the SatCat5 FPGA-based project by [The Aerospace Corporation] goals to offer: a gateway akin to an unmanaged Ethernet change that additionally helps these non-Ethernet hyperlinks. Not too long ago they answered a spread of questions concerning the challenge on Hacker Information.

The challenge title comes from the first target market: smallsat and cubesat builders, which is an space the place with the ability to route extra site visitors over a standard Ethernet-based bus is a significant boon. The offered Xilinx Artix-7-based reference design (pictured) provides a good suggestion of how it may be used: it combines an Arty A7 growth board with a customized PCB containing an Ethernet change IC (SJA1105), TJA1100 transceiver, two RJ45 jacks and 4 PMOD connectors, right here related to 2 UARTs for bidirectional communication between them. Ethernet body encapsulation is offered utilizing the usual Serial Line Web Protocol (SLIP), with extra particulars coated within the FAQ. At a minimal an FPGA like a Lattice iCE40 is required, with an MCU able to utilizing the provided C++ libraries, or a customized implementation.

Because of [STR-Alorman] for the tip.


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